Question about QT60168.

[DominusT]

Hi.

I have long worked with the integrated circuit QT60168.

When I send the command called "Setup CRC Check - 0x0E, QT always respond a 0x5D, which is the CRC of the EEPROM.

I never run the command "Enter Mode-0x01 Setups.

Today, an integrated circuit QT respond a different value of 0x5D, so I decided to understand the transfer Setups block.

I'm loading in an array the parameters listed in Table 5-1 (qt60248_402 document), which details the Stups Block and this is how I load those values in my vector:

for (i = 0; i < 24; i++)
ItemQT[j++] = 0xA6; //Neg thresh y Neg Drift Comp
for (i = 0; i < 24; i++)
ItemQT[j++] = 0x52; // Normal DI Limit y Fast DI Limit
for (i = 0; i < 24; i++)
ItemQT[j++] = 0x14; // Neg recal delay
for (i= 0; i< 24; i++)
ItemQT[j++] = 0x20; //Burst Length AKS Scope Sync
ItemQT[j++] = 0x00; // Mains Sync
ItemQT[j++] = 0x01; // Burst spacing
ItemQT[j++] = 0x64; // Lower signal Limit
ItemQT[j++] = 0x00;
ItemQT[100] = 0; // CRC
for (i = 0; i< 100; i++)
ItemQT[100] = crc_cal(ItemQT[100],ItemQT[i]);

The function to compute the CRC is:

unsigned char crc_cal(unsigned char crc, unsigned char data)
{
unsigned char index; // shift counter
unsigned char fb;
index = 8; // initialize the shift counter
do
{
fb = (crc ^ data) & 0x01;
data >>= 1;
crc >>= 1;
if(fb)
crc ^= 0x8c;
} while(--index);
return crc;
}

In calculating the CRC in Item [100], the result is 0xA6, which is different to 0x5D.

What am I doing wrong?

One more thing, for example, item 4 of Table 5-1 (Burst Length, AKS & Scope Sync) indicates only bit 7, bit 6 and bit 5, The Table 5-1 doesn't mention about the remaining bits of byte. I assume they are zero.

Am I right?

Fabián

[DominusT]

Because there is no suggestion, even from Atmel, we will choose the technology mTouch of MCHP.

Thanks anyway.

[DominusT]

Better late than never.

"Dear Fabian

The setup block found in the default factory setting is as below.
The assumption of unspecifed bits to be '0' is not correct. All unused bits
are kept at '1'.


0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0xA6
0xA6 0xA6
0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0xA6 0x52 0x52 0x52 0x52 0x52 0x52
0x52 0x52
0x52 0x52 0x52 0x52 0x52 0x52 0x52 0x52 0x50 0x50 0x50 0x50 0x50 0x50
0x50 0x50
0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14
0x14 0x14
0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x2F 0x2F 0x2F 0x2F 0x2F 0x2F
0x2F 0x2F
0x2F 0x2F 0x2F 0x2F 0x2F 0x2F 0x2F 0x2F 0x2F 0x2F 0x2F 0x2F 0x2F 0x2F
0x2F 0x2F
0xBF 0xF1 0x64 0x00


The setup block sent by you is by taking loops of 24, but you have not
taken care of the unused keys of QT60168.
The QT60168 supports a maximum of 16 keys and QT60248 supports maximum of
24 keys. Both these devices come in identical pin configuration as well
as setup blocks.
The NDIL parameter is used to enable or disable keys. In factory
settings of QT60168 only first 2 Y lines are enabled. The CRC of this
default setting is 0x5D. You can see in the default setup block that the
last eight keys have a NDIL value of '0' (disable key).

Your setup block tries to enable all the keys, and the CRC value for the
setup block provided by you is 0xA6, which is as per the CRC algorithm
provided in the datasheet.

I hope this provides you a better understanding of the use of the setup
blocks in QT60168 / QT60248.


Best Regards,
Abhishek Ghosh
Atmel Technical Support Team"